From 90b868cf1a65d66877e0503ef544bd5a0f63b0ac Mon Sep 17 00:00:00 2001
From: Chris Xiong <chirs241097@gmail.com>
Date: Thu, 29 Feb 2024 00:42:32 -0500
Subject: New post, small corrections to R-BUS stuff.

---
 blog/post/2024-02-02.html | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'blog/post/2024-02-02.html')

diff --git a/blog/post/2024-02-02.html b/blog/post/2024-02-02.html
index db66d21..8d34fc5 100644
--- a/blog/post/2024-02-02.html
+++ b/blog/post/2024-02-02.html
@@ -490,8 +490,8 @@ characteristics of the interface</h2>
 <h3 id="tocanch5" class="tvis">Power</h3>
 <p>The +5V supply is derived straight from the +5V rail that goes into
 the main board, with polarity protection (both in the XV-5080 and
-VS-2400) provided with a Schottky diode, and sometimes a current
-protected with a thermistor (not present in the XV-5080).</p>
+VS-2400) provided with a Schottky diode, and sometimes current protected
+with a thermistor (not present in the XV-5080).</p>
 <p>The +5V pin measured 5.28V to ground on my XV-5080.</p>
 <h3 id="tocanch6" class="tvis">Digital Audio</h3>
 <p>The format of digital audio portion of R-BUS resembles <a href="https://en.wikipedia.org/wiki/I%C2%B2S">I²S</a>, but with a few
@@ -506,7 +506,7 @@ first 24-bit is being used.</li>
 protocol:</p>
 <ul>
 <li>The frame sync (word clock) signal runs at the same frequency as the
-sampling rate.</li>
+audio sampling rate.</li>
 <li>When frame sync is low, left channel of each channel pair is being
 transmitted, otherwise right channel is being transmitted.</li>
 <li>Each half cycle of the frame sync clock is divided into 32 periods,
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